| Virtualization of AEGIS: A Study of the Feasibility of Applying Open Architecture Technology to the Surface Navy's Most Complex Automated Weapon System |
Sep 2011 |
72 pages |
| Authors:
Erik S Roberts; NAVAL POSTGRADUATE SCHOOL MONTEREY CA
|
 | Rising costs of proprietary equipment in legacy electronic applications are increasingly drawing resources from vital programs. Growing interest in evaluating Open Architecture technology to replace closed systems is evidenced by the number of recent publications on the subject. Researchers have approached this topic from various angles, including lifecycle management, risk simulation, total cost of ownership, and knowledge-value added measures. This exploratory study uses open architecture hardware employing virtualization technology to ... |
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| Network Management System for Tactical Mobile Ad Hoc Network Segments |
Sep 2011 |
101 pages |
| Authors:
Chad J Puff; NAVAL POSTGRADUATE SCHOOL MONTEREY CA
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| Mobile Ad Hoc Networking (MANET) technologies are highly desirable in tactical environments because they are able to communicate with neighboring devices over one or more hops in order to extend connectivity to areas where a fixed infrastructure is not available or is not possible. There are many factors which can influence the performance and reliability of a MANET. Communications links within the MANET are continuously fluctuating due to device location, ... |
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| Risk, Uncertainty and Open Architecture in the DoD Acquisition System |
Sep 2011 |
101 pages |
| Authors:
Scott F Cole; NAVAL POSTGRADUATE SCHOOL MONTEREY CA
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| This thesis analyzes the impact of risk and uncertainty on the Department of Defense (DoD) Acquisitions System and the decision making process of modern Program Managers. A number of risks and uncertainties will be identified and a determination will be made if Service Oriented Architecture (SOA) and Open Architecture (OA) decreases or increases risks and uncertainty. In addition, it explores whether SOA and OA has achieved projected significant cost savings. ... |
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| Developing Information Storage and Retrieval Systems on the Internet: A Knowledge Management Approach |
Sep 2011 |
91 pages |
| Authors:
Charles A Fulmer; NAVAL POSTGRADUATE SCHOOL MONTEREY CA
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| Search is becoming the primary way in which people get information. In 2010, global Internet usage was over two billion people, with 92% of online adults using search engines to find information. Most commercial search engines (Google, Yahoo, Bing, etc.) provide their indexing and search services at no cost. The DoD can achieve large gains at a small cost by making public documents available to search engines. This can be ... |
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| Extracting Forensic Artifacts from Windows O/S Memory |
30 Aug 2011 |
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| Authors:
James S Okolica; Gilbert L Peterson; AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING
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| Memory analysis is a rapidly growing area in both digital forensics and cyber situational awareness (SA). Memory provides the most accurate snapshot of what is occurring on a computer at a moment in time. By combining it with event and network logs as well as the files present on the filesystem, an analyst can re-create much of what has occurred and is occuring on a computer. The Compiled Memory Analysis ... |
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| Enabling Computational Dynamics in Distributed Computing Environments Using a Heterogeneous Computing Template |
09 AUG 2011 |
11 pages |
| Authors:
Dan Negrut; Toby Heyn; Andrew Seidl; Dan Melanz; David Gorsich; David Lamb; ARMY TANK AUTOMOTIVE RESEARCH DEVELOPMENT AND ENGINEERING CENTER WARREN MI
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| This paper describes a software infrastructure made up of tools and libraries designed to assist developers in implementing computational dynamics applications running on heterogeneous and distributed computing environments. Together, these tools and libraries compose a so called Heterogeneous Computing Template (HCT). The underlying theme of the solution approach embraced by HCT is that of partitioning the domain of interest into a number of sub-domains that are each managed by a ... |
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| Enabling Computational Dynamics in Distributed Computing Environments Using a Heterogeneous Computing Template |
01 Aug 2011 |
47 pages |
| Authors:
Dan Negrut; David Gorsich; David Lamb; Toby Heyn; Andrew Seidl; Dan Melanz; ARMY TANK AUTOMOTIVE RESEARCH DEVELOPMENT AND ENGINEERING CENTER WARREN MI
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| This briefing looks at the use of High Performance Computing (HPC) to simulate the dynamics of real-life engineering mechanical systems at unprecedented levels of accuracy. HPC will soon enable simulation of billion-body problems. |
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| Energy Efficiency Evaluation and Benchmarking of AFRL's Condor High Performance Computer |
Aug 2011 |
11 pages |
| Authors:
Ryan Luley; Courtney Usmail; Mark Barnell; AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE
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| Emerging supercomputers strive to achieve an ever increasing performance metric at the cost of excessive power consumption and heat production. This expensive trend has prompted an increased interest in green computing. Green computing emphasizes the importance of energy conservation, minimizing the negative impact on the environment while achieving maximum performance and minimizing operating costs. The Condor Cluster, a heterogeneous supercomputer composed of Intel Xeon X5650 processors, Cell Broadband Engine processors, ... |
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| Secure Proactive Recovery a Hardware Based Mission Assurance Scheme |
Aug 2011 |
10 pages |
| Authors:
Ruchika Mehresh; Shambhu Upadhyaya; Kevin Kwiat; AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE
|
| Mission Assurance in critical systems entails both fault tolerance and security. Since fault tolerance via redundancy or replication is contradictory to the notion of a limited trusted computing base, normal security techniques cannot be applied to fault tolerant systems. Thus, in order to enhance the dependability of mission critical systems, designers employ a multi-phase approach that includes fault/threat avoidance/prevention, detection and recovery. Detection phase is the fallback plan for avoidance/prevention ... |
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| Analysis of Dynamic Linear and Non-Linear Memristor Device Models for Emerging Neuromorphic Computing Hardware Design |
Aug 2011 |
6 pages |
| Authors:
Nathan R McDonald; Robinson E Pino; Peter J Rozwood; Bryant T Wysocki; AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE
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| The value memristor devices offer to the neuromorphic computing hardware design community rests of the ability to provide effective device models that can enable large scale integrated computing architecture application simulations. Therefore, it is imperative to develop practical, functional device models of minimum mathematical complexity for fast, reliable, and accurate computing architecture technology design and simulation. To this end, various device models have been proposed in the literature seeking to ... |
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| Compact Method for Modeling and Simulation of Memristor Devices |
Aug 2011 |
5 pages |
| Authors:
Robinson E Pino; James W Bohl; Nathan McDonald; Bryant Wysocki; Peter Rozwood; Kristy A Campbell; Antonio Oblea; Achyut Timilsina; AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE
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| A compact model and simulation methodology for chalcogenide based memristor devices is proposed. From a microprocessor design view point, it is important to be able to simulate large numbers of devices within the integrated circuit architecture in order to speed up reliably the development process. Ideally, device models would accurately describe the characteristic device behavior and would be represented by single-valued equations without requiring the need for recursive or numerically ... |
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| Hardware Trojans - Prevention, Detection, Countermeasures (A Literature Review) |
JUL 2011 |
50 pages |
| Authors:
Mark Beaumont; Bradley Hopkins; Tristan Newby; DEFENCE SCIENCE AND TECHNOLOGY ORGANISATION EDINBURGH (AUSTRALIA) COMMAND CONTROL COMMUNICATIONS AND INTELLIGENCE DIV
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| A Hardware Trojan is a malicious, undesired, intentional modification of an electronic circuit or design, resulting in the incorrect behaviour of an electronic device when in operation - a back-door that can be inserted into hardware. A Hardware Trojan may be able to defeat any and all security mechanisms (software or hardware-based) and subvert or augment the normal operation of an infected device. This may result in modifications to the ... |
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| Benefits and Challenges of Architecture Frameworks |
JUN 2011 |
40 pages |
| Authors:
Daniel Ota; Michael Gerz; FGAN-FKIE WACHTBERG (GERMANY)
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| Architecture frameworks have become a popular means of coping with the complexity of today's enterprises. They support the specification of architectures by providing a method for designing and describing them. An architecture framework typically defines a common terminology, a set of views focusing on particular aspects of the architecture, a set of architecture types with varying levels of detail, and a methodology for the development and maintenance of an architecture ... |
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| Applicability of Visual Analytics to Defence and Security Operations |
JUN 2011 |
51 pages |
| Authors:
Valerie Lavigne; Denis Gouin; DEFENCE RESEARCH AND DEVELOPMENT CANADA VALCARTIER (QUEBEC)
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| In the context of modern defence and security operations, analysts are faced with a continuously growing set of information of different nature which causes significant information overload problems and prevent developing good situation awareness. Fortunately, Visual Analytics (VA) has emerged as an efficient way of handling and making sense of massive data sets by exploiting interactive visualization technologies and human cognitive abilities. Defence R&D Canada has conducted a review of ... |
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| Using Mobile Devices for Robotic Controllers: Examples and Some Initial Concepts for Experimentation |
Jun 2011 |
40 pages |
| Authors:
Rosemarie E Yagoda; Susan G Hill; ARMY RESEARCH LAB ABERDEEN PROVING GROUND MD
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| The U.S. Army has a great interest in unmanned robotic systems. Robotic systems are seen as potential force multipliers because some robotic systems can do tasks that would otherwise require one or more Soldiers. Robotic systems are also seen in terms of potential force protection because some technology can be used in environments where Soldiers might be at risk, thereby reducing Soldiers' exposure to potential harm. A related area of ... |
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| Performance Engineering 101 |
18 May 2011 |
26 pages |
| Authors:
Eric Landrieu; MISSION SOLUTIONS ENGINEERING LLC MOORESTOWN NJ
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| The Agile Classroom: Can Syncing Enterprise Data with Mobile Devices Get Us There? |
17 May 2011 |
10 pages |
| Authors:
Paul Flanagan; INFORMATION RESOURCES MANAGEMENT COLL WASHINGTON DC
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| The Use of Model-Driven Methodologies and Processes in Aegis Development |
17 May 2011 |
31 pages |
| Authors:
Jamie Durbin; Christopher M Thompson; LOCKHEED MARTIN ADVANCED TECHNOLOGY LABS CHERRY HILL NJ
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| Single Photon Holographic Qudit Elements for Linear Optical Quantum Computing |
May 2011 |
17 pages |
| Authors:
Warner Miller; FLORIDA ATLANTIC UNIV BOCA RATON
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| The operational objective of this project is to demonstrate that a small, lightweight, field-deployable, low-cost quantum algorithm (e.g. Grover's search algorithm) is feasible using existing technology. We have designed such optical elements and have begun a collaboration with CREOL (Leonid Glebov) to manufacture such gates for experimental demonstration of the results under this effort. Our technical objective of this project was the simulation and design of fundamental quantum logic gates, ... |
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| Extending Bayesian Logic Programs for Plan Recognition and Machine Reading |
MAY 2011 |
38 pages |
| Authors:
Sindhu V. Raghavan; TEXAS UNIV AT ARLINGTON DEPT OF COMPUTER SCIENCE
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| Statistical relational learning (SRL) is the area of machine learning that integrates both first-order logic and probabilistic graphical models. The advantage of these formalisms is that they can handle both uncertainty and structured/relational data. As a result, they are widely used in domains like social network analysis, biological data analysis, and natural language processing. Bayesian Logic Programs (BLPs), which integrate both first-order logic and Bayesian networks are a powerful SRL ... |
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| Numeric Function Generators Using Piecewise Arithmetic Expressions |
MAY 2011 |
7 pages |
| Authors:
Shinobu Nagayama; Tsutomu Sasao; Jon T. Butler; NAVAL POSTGRADUATE SCHOOL MONTEREY CA DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
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| This paper proposes new architectures for numeric function generators (NFGs) using piecewise arithmetic expressions. The proposed architectures are programmable, and they realize a wide range of numeric functions. To design an NFG for a given function, we partition the domain of the function into uniform segments, and transform a subfunction in each segment into an arithmetic spectrum. From this arithmetic spectrum, we derive an arithmetic expression, and realize the arithmetic ... |
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| Enhancing the Usability of the Human Machine Interface: Handheld Interagency Identity Detection Equipment (HIIDE) |
May 2011 |
24 pages |
| Authors:
Kelly Faddis; John Howard; Jerrell Stracener; SOUTHERN METHODIST UNIV DALLAS TX
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| Advances in the Acquisition of Secure Systems Based on Open Architectures |
30 Apr 2011 |
49 pages |
| Authors:
Walt Scacchi; Thomas Alspaugh; CALIFORNIA UNIV IRVINE INSTITUTE FOR SOFTWARE RESEARCH
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| The role of software ecosystems in the development and evolution of secure open architecture systems has received insufficient consideration. Such systems are composed of software components subject to different security requirements in an architecture in which evolution can occur by evolving existing components or by replacing them. But this may result in possible security requirements conflicts and organizational liability for failure to fulfill security obligations. We have developed an approach ... |
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| Delivering Savings with Open Architecture and Product Lines |
30 Apr 2011 |
49 pages |
| Authors:
Brian Womble; William Schmidt; Mike Arendt; Tim Fain; PROGRAM EXECUTIVE OFFICE INTEGRATED WARFARE SYSTEMS WASHINGTON DC
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| The unpredictable nature of the 21st century national security environment in conjunction with severe downward budgetary pressures has placed a new emphasis on achieving mission success with fewer resources. As the Department of Defense has sought to transform itself to meet this new requirement, Open Architecture (OA) has been viewed as one innovative tool for reducing costs (through greater efficiencies, enhanced competition, lower life-cycle cost, etc.) while maintaining the ability ... |
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| Ultra High Speed Single Electron Memory Devices based on Carbon Nanotube Quantum Dots |
25 Apr 2011 |
30 pages |
| Authors:
Eui-Hyeok Yang; Stefan Strauf; Frank Fisher; Daniel Choi; STEVENS INST OF TECHNOLOGY HOBOKEN NJ
|
| We fabricated a 200 nm quantum dot (QD)-based single electron transistor (SET) device using chemical vapor deposition (CVD) grown in-plane SWNTs. Pronounced conductance oscillation signatures were found in the Coulomb blockade regime demonstrating that the SWNT-QD device operates as a single electron transistor. Further, we observed aperiodic conductivity oscillations in a quasiballistic graphene field effect transistor (GFET), which is of importance for future development of graphene based nanoelectronic devices. In ... |
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| The Retention of Digital Skills Following Distributed and Traditional Training |
Apr 2011 |
72 pages |
| Authors:
Gregory A Goodwin; Jennifer S Tucker; Richard L Wampler; Amanda N Gesselman; Vanessa Johnson; ARMY RESEARCH INST FOR THE BEHAVIORAL AND SOCIAL SCIENCES FORT BENNING GA
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| As digital systems proliferate in the Army, there is a need for commanders to understand how to best maintain these critical warfighter skills. In the present report, skill retention for the Force XXI Battle Command Brigade and Below (FBCB2) digital system was investigated following traditional face-to-face training and distributed learning (dL) training. This second type of training was examined because little is known about training digital skills using this method. ... |
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| 40 GSps, 6-bit RF DAC Design Report |
Mar 2011 |
28 pages |
| Authors:
James E Wilson; ARMY RESEARCH LAB ADELPHI MD SENSORS AND ELECTRON DEVICES DIRECTORATE
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| This report details the design of a 40 GSps, 6-bit radio frequency (RF) digital-to-analog converter (DAC). The technology used is IBM 45 nm complementary metal oxide (CMOS) silicon-on-insulator (SOI). The architecture of the DAC is a novel approach of interleaving multiple subDACs in such a way that the nyquist images cancel each other out, allowing beyond Nyquist use of the subDACs. This technique is leveraged to build the 40 GSps ... |
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| Automated Analysis of ARM Binaries using the Low-Level Virtual Machine Compiler Framework |
Mar 2011 |
103 pages |
| Authors:
Jeffery Scott; AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING AND MANAGEMENT
|
| Binary program analysis is a critical capability for offensive and defensive operations in Cyberspace. However, many current techniques are ineffective or time-consuming and few tools can analyze code compiled for embedded processors such as those used in network interface cards, control systems and mobile phones. This research designs and implements a binary analysis system, called the Architecture-independent Binary Abstracting Code Analysis System (ABACAS), which reverses the normal program compilation process, ... |
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| Successfully Managing Insurgencies and Terrorism Effectively (SMITE) |
Mar 2011 |
93 pages |
| Authors:
David O Ross; Robinson C Ihle; AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE
|
| SMITE sought to develop a wargame to assist the examination of the applicability of new technology and TTPs and secondarily provide a modifiable tool useful for training, educating and assisting American and allied planners committed to COIN/CT & AT/FP efforts (hereafter referred to simply as COIN). SMITE assessed various hypotheses on how to measure progress in COIN operations; incorporating the most influential measures into planning support tools in new ways ... |
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| PrOtocols for WatERmarking (POWER) |
MAR 2011 |
96 pages |
| Authors:
Christina Kraetzer; Jana Dittmann; OTTO VON GUERICKE UNIV MAGDEBURG (GERMANY)
|
| This report results from a contract tasking Otto-von-Guericke University of Magdeburg as follows: Within the work on the POWER project the overall problems of realizing information assurance (trustworthiness in the sense of integrity and confidentiality) and information provenance (specifically authentication of digital data objects and their origin) with digital watermarking as an alternative or complement to cryptography for several application scenarios is addressed. The current problem in the application of ... |
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| Literature Review of the State of the Art for Graphical User Interfaces (GUI) for a Series of Oil Quality Monitoring Sensors for Shipboard Equipment |
Mar 2011 |
46 pages |
| Authors:
K J KarisAllen; FACTS ENGINEERING INC HALIFAX (NOVA SCOTIA)
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| Over the past several years, DRDC Atlantic has embarked on a program for the evaluation of existing technologies, as well as the development of new technologies for application in platform specific lubricating oil condition monitoring systems. The current study is primarily focused on conducting a literature review of the current state of the art for graphical user interfaces (GUI) with general discussions of background technologies and potential frameworks for developing ... |
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| Survivability in Layered Networks |
FEB 2011 |
206 pages |
| Authors:
Kayi Lee; MASSACHUSETTS INST OF TECH CAMBRIDGE DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
|
| In layered networks, a single failure at the lower (physical) layer may cause multiple failures at the upper (logical) layer. As a result, traditional schemes that protect against single failures may not be effective in layered networks. This thesis studies the problem of maximizing network survivability in the layered setting, with a focus on optimizing the embedding of the logical network onto the physical network. In the first part of ... |
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| Design and Analysis of Reconfigurable Analog System |
FEB 2011 |
153 pages |
| Authors:
Payam Lajevardi; MASSACHUSETTS INST OF TECH CAMBRIDGE DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
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| A highly-configurable analog system is presented. A prototype chip is fabricated and an ADC and filter functionalities are demonstrated. The chip consists of eight identical programmable stages. In an ADC configuration, the first five stages are programmed to implement a 10- bit ADC. The ADC has ENOB of 8 bits at 50 MSPS. The ENOB improves to 8.5 bits if the sampling rate is lowered to 30 MSPS. The ADC ... |
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| Trust and Trusted Computing Platforms |
Jan 2011 |
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| Authors:
David A Fisher; Jonathan M McCune; Archie D Andrews; CARNEGIE-MELLON UNIV PITTSBURGH PA SOFTWARE ENGINEERING INST
|
 | Hardware-based trusted computing platforms are intended to overcome many of the problems of trust that are prominent in computing systems. In this paper, a result of the Software Engineering Institute's Independent Research and Development Project Trusted Computing in Extreme Adversarial Environments: Using Trusted Hardware as a Foundation for Cyber Security, we discuss the capabilities and limitations of the Trusted Platform Module (TPM). We describe credential storage, device identity, chains of ... |
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| Exploiting Data Similarity to Reduce Memory Footprints |
Jan 2011 |
14 pages |
| Authors:
Susmit de Biswas; Bronis R Supinski; Martin Schulz; Diana Franklin; Timothy Sherwood; Frederic T Chong; LAWRENCE LIVERMORE NATIONAL LAB CA
|
| Memory size has long limited large-scale applications on high-performance computing (HPC) systems. Since compute nodes frequently do not have swap space, physical memory often limits problem sizes. Increasing core counts per chip and power density constraints, which limit the number of DIMMs per node, have exacerbated this problem. Further DRAM constitutes a significant portion of overall HPC system cost. Therefore, instead of adding more DRAM to the nodes, mechanisms to ... |
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| Thermal Properties of Nanostructured Electrodes for Phase Change Memory Devices |
Jan 2011 |
11 pages |
| Authors:
Elah Bozorg-Grayeli; John P Reifenberg; Matthew Panzer; Jeremy A Rowlette; Kenneth E Goodson; STANFORD UNIV CA
|
| The switching current for phase change memory devices, which is a key figure of merit for this technology, can be strongly influenced by heat conduction in the electrodes. Here we propose and characterize a novel multilayer electrode stack, which uses series thermal boundary resistances to impede heat loss from the memory cell. Picosecond time domain thermo reflectance captures the temperature-dependent thermal resistance of as deposited and post-annealed single and multi-layer ... |
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| Insourcing and Outsourcing for U.S. Department of Defense IT Projects: A Model |
Jan 2011 |
26 pages |
| Authors:
Karla Marquis; COMPUTER SCIENCES CORP FALLS CHURCH VA
|
| A vigorous public debate is occurring over the definition of inherently governmental and whether it is more effective and efficient for the U.S. Department of Defense (DoD) to outsource Information Technology (IT) efforts to contracting organizations or insource work into the DoD civilian workforce, i.e., perform these efforts in-house. Questions often arise over how the DoD can best provide an environment that fosters innovation and maintain a healthy Defense Industrial ... |
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| Variational Assimilation of Glider Data in Monterey Bay |
Jan 2011 |
17 pages |
| Authors:
Chudong Pan; Max Yaremchuk; Dmitri Nechaev; Hans Ngodock; NAVAL RESEARCH LAB STENNIS DETACHMENT STENNIS SPACE CENTER MS OCEANOGRAPHY DIV
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| Temperature and salinity profiles observed by gliders in the Monterey Bay in August 2003 are assimilated into NCOM model in the framework of a 3dVar scheme with a hybrid background error covariance (BEC) representation. The model performance is validated against independent mooring observations for the assimilation runs with I-hour analysis cycle In the first experiment the background error statistics was estimated using the ensemble of model states spanning the entire ... |
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| Fighting Fire with Fire: Modeling the Datacenter-Scale Effects of Targeted Superlattice Thermal Management |
Jan 2011 |
12 pages |
| Authors:
Susmit Biswas; Mohit Tiwari; Timothy Sherwood; Luke Theogarajan; Frederic T Chong; LAWRENCE LIVERMORE NATIONAL LAB CA
|
| Local thermal hot-spots in microprocessors lead to worstcase provisioning of global cooling resources, especially in large-scale systems. However, efficiency of cooling solutions degrade non-linearly with supply temperature, resulting in high power consumption and cost in cooling - 50100% of IT power. Recent advances in active cooling techniques have shown on-chip thermoelectric coolers (TECs) to be very efficient at selectively eliminating small hot-spots, where applying current to a superlattice film deposited ... |
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| Rapid Prototyping of High Performance Signal Processing Applications |
Jan 2011 |
170 pages |
| Authors:
Nimish Sane; MARYLAND UNIV COLLEGE PARK DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
|
| Advances in embedded systems for digital signal processing (DSP) are enabling many scientific projects and commercial applications. At the same time, these applications are key to driving advances in many important kinds of computing platforms. In this region of high performance DSP, rapid prototyping is critical for faster time-to-market (e.g., in the wireless communications industry) or time-to-science (e.g., in radio astronomy). DSP system architectures have evolved from being based on ... |
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| Security Checkers: Detecting Processor Malicious Inclusions at Runtime |
Jan 2011 |
7 pages |
| Authors:
Michael Bilzor; Ted Huffmire; Cynthia Irvine; Tim Levin; NAVAL POSTGRADUATE SCHOOL MONTEREY CA DEPT OF COMPUTER SCIENCE
|
| To counter the growing threat of malicious subversions to the design of a microprocessor, there is a great need for simple, automated methods for detecting such malevolent changes. Based on the adoption of the Property Specification Language (PSL) for behavioral verification, and the advent of tools for automatically generating synthesizable hardware design language (HDL) constructs for verifying a PSL assertion, we propose a new method called Security Checkers, which uses ... |
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| 3-D Extensions for Trustworthy Systems |
Jan 2011 |
11 pages |
| Authors:
Ted Huffmire; Timothy Levin; Cynthia Irvine; Ryan Kastner; Timothy Sherwood; NAVAL POSTGRADUATE SCHOOL MONTEREY CA DEPT OF COMPUTER SCIENCE
|
| Trustworthy system development entails a high nonrecurring engineering (NRE) cost together with a low volume of units over which to amortize that cost. For example, the potential for developmental and operational attacks against hardware requires countermeasures that make it very expensive to design and manufacture custom hardware used to build high assurance systems. To address these problems, we propose an approach to trustworthy system development based on 3-D integration, an ... |
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| Finding Services for an Open Architecture: A Review of Existing Applications and Programs in PEO C4I |
2011 |
47 pages |
| Authors:
Isaac R. Porche III; James Dryden; Kathryn Connor; Bradley Wilson; Shawn McKay; Kate Giglio; Juan Montelibano; RAND NATIONAL DEFENSE RESEARCH INST SANTA MONICA CA
|
| This report provides an overview of a study that was intended to lay the groundwork for the U.S. Navy's Program Executive Office, Command, Control, Communications, Computers, and Intelligence (PEO C4I), toward the service-based concept of an open architecture. Building on previous work for PEO C4I that speaks to the flexibility and costeffectiveness of service-oriented architecture (SOA), the study investigated the potential services that could be used as part of an ... |
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| Capacitive Power Transfer |
15 Dec 2010 |
38 pages |
| Authors:
Mitchell H Kline; CALIFORNIA UNIV BERKELEY DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
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| The simplicity and low cost of capacitive interfaces makes them very attractive for wireless charging stations and galvanically isolated power supplies. Major benefits include low electromagnetic radiation and the amenability of combined power and data transfer over the same interface. We present a capacitive power transfer circuit using series resonance that enables efficient high frequency, moderate voltage operation through soft-switching. An included analysis predicts fundamental limitations on the maximum achievable ... |
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| Fundamental Problems of Hybrid CMOS/Nanodevice Circuits |
14 Dec 2010 |
4 pages |
| Authors:
Konstantin K Likharev; James Lukens; STATE UNIV OF NEW YORK AT STONY BROOK
|
| This project was focused on key fundamental issues of future hybrid CMOS/nanodevice circuits: (i) optimization of metal-oxide devices with resistive bistability, and (ii) design and simulation of single-electron molecular latching switches. The report describes the significant progress made in both directions, including - fabrication of bistable TiOx devices with yield up to 70% and endurance up to 103 cycles, - design and characterization of single-electron molecular latching switches, and - ... |
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| FPGA Implementation of Robust Symmetrical Number System in High-Speed Folding Analog-to-Digital Converters |
Dec 2010 |
129 pages |
| Authors:
Han W Lim; NAVAL POSTGRADUATE SCHOOL MONTEREY CA
|
| Analog-To-Digital Converters (ADCs) are integral building blocks of most sensor and communication systems today. As the need for ADCs with faster conversion speeds and lower power dissipation increases, there is a growing motivation to reduce the number of power-consuming components by employing folding circuits to fold the input analog signal symmetrically, prior to quantization by high-speed comparators. These properties of low-power consumption, compactness, high-resolution and fast conversion speeds make folding ... |
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| Photonic Analog-to-Digital Converter Preprocessing Using the Robust Symmetrical Number System for Direct Digitization of Antenna Signals |
Dec 2010 |
105 pages |
| Authors:
Kee L Tong; NAVAL POSTGRADUATE SCHOOL MONTEREY CA CENTER FOR JOINT SERVICES ELECTRONIC WARFARE
|
| The need to realize pervasive battlespace awareness is placing an increasing demand on the bandwidth and resolution performance of modern sensors, communication receivers and electronic warfare. Fundamental to realizing this demand is the omnipresent highspeed analog-to-digital converters. The need constantly exists for converters with lower power consumption. To reduce the number of power-consuming components, high-performance ADCs employ parallel configuration of analog folding circuits to symmetrically fold the input signal prior ... |
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| Computer Generation of Fourier Transform Libraries for Distributed Memory Architectures |
DEC 2010 |
160 pages |
| Authors:
Srinivas Chellappa; CARNEGIE-MELLON UNIV PITTSBURGH PA DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
|
| High-performance discrete Fourier transform (DFT) libraries are an important requirement for many computing platforms. Unfortunately, developing and optimizing these libraries for modern complex platforms has become extraordinarily difficult. To make things worse, performance often does not port, thus requiring permanent re-optimizations. Overcoming this problem has been the goal of SPIRAL, a library generation system that can produce highly optimal DFT code from a high level specification of algorithms and target ... |
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| Hardware Trust Implications of 3-D Integration |
DEC 2010 |
11 pages |
| Authors:
Ted Huffmire; Timothy Levin; Michael Bilzor; Cynthia E. Irvine; Jonathan Valamehr; Mohit Tiwari; Timothy Sherwood; Ryan Kastner; NAVAL POSTGRADUATE SCHOOL MONTEREY CA DEPT OF COMPUTER SCIENCE
|
| 3-D circuit-level integration is a chip fabrication technique in which two or more dies are stacked and combined into a single circuit through the use of vertical electroconductive posts. Since the dies may be manufactured separately, 3-D circuit integration offers the option of enhancing a commodity processor with a variety of security functions. This paper examines the 3-D design approach and provides an analysis concluding that the commodity die system ... |
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| Extreme Scale Computing Studies |
DEC 2010 |
590 pages |
| Authors:
Mark A. Richards; Daniel P. Campbell; GEORGIA INST OF TECH ATLANTA
|
| This document is the draft Final Technical Report for Georgia Institute of Technology (Georgia Tech, GT) Project 210667V, "Exascale Computing Study" (ECS). Four studies were conducted to determine the technical developments needed for a 1,000x increase in computational capability by 2015. 1. The Exascale Computing Study, addressing hardware and system architecture issues; 2. The Exascale Computing Software Study, addressing software technologies to effectively utilize extreme levels of concurrency; 3. The ... |
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