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Abstract:
TASKS: (Talk Outline) ACCOMPLISHED * Verilog models of two bootable microprocessors (simple/advanced) * Initial work on robust architectures (reliability studies, draft floorplan) IN PROGRESS * Verilog model of microprocessor with hardware checkpoint/repair FUTURE WORK * Fabricate and test physical designs * Enhanced Verilog and SPICE software.
| Limitations: |
 APPROVED FOR PUBLIC RELEASE |
| Description: |
Briefing charts |
| Pages: |
16 |
| Report Date: |
08 Jun 2002 |
| Report Number: |
A695925 |
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